The advent of portable computers has created intense demand for displays which are lightweight, compact and power efficient. Since the space available for the display function of these devices precludes the use of a conventional cathode ray tube (CRT), there has been significant interest in efforts to provide satisfactory flat panel displays having comparable or even superior display characteristics, e.g., brightness, resolution, versatility in display, power consumption, etc. These efforts, while producing flat panel displays that are useful for some applications, have not produced a display that can compare to a conventional CRT.
Currently, liquid crystal displays are used almost universally for laptop and notebook computers. In comparison to a CRT, these displays provide poor contrast, only a limited range of viewing angles is possible, and, in color versions, they consume power at rates which are incompatible with extended battery operation. In addition, color screens tend to be far more costly than CRT's of equal screen size.
As a result of the drawbacks of liquid crystal display technology, thin film field emission display technology has been receiving increasing attention by industry. Flat panel displays utilizing such technology employ a matrix-addressable array of pointed, thin-film, cold field emission cathodes in combination with an anode comprising a phosphor-luminescent screen.
The phenomenon of field emission was discovered in the 1950's, and extensive research by many individuals, such as Charles A. Spindt of SRI International, has improved the technology to the extent that its prospects for use in the manufacture of inexpensive, low-power, high-resolution, high-contrast, full-color flat displays appear to be promising.
Advances in field emission display technology are disclosed in U.S. Pat. No. 3,755,704, "Field Emission Cathode Structures and Devices Utilizing Such Structures," issued 28 Aug. 1973, to C. A. Spindt et al.; U.S. Pat. No. 4,857,161, "Process for the Production of a Display means by Cathodoluminescence Excited by Field Emission," issued 15 Aug. 1989, to Michel Borel et al.; U.S. Pat. No. 4,940,916, "Electron Source with Micropoint Emissive Cathodes and Display Means by Cathodoluminescence Excited by Field Emission Using Said Source," issued 10 Jul. 1990 to Michel Borel et al.; U.S. Pat. No. 5,194,780, "Electron Source with Microtip Emissive Cathodes," issued 16 Mar. 1993 to Robert Meyer; and U.S. Pat. No. 5,225,820, "Microtip Trichromatic Fluorescent Screen," issued 6 Jul. 1993, to Jean-Frederic Clerc. These patents are incorporated by reference into the present application.
The present invention relates to the use of a resistive layer to provide a ballast against excessive current drawn by the electron emitters. In the prior art, there are two approaches to providing such ballasting. A vertical resistor approach is disclosed in the Borel et al. ('916) patent and discussed in relation to FIG. 1 herein; a lateral resistor approach is disclosed in the Meyer ('780) patent and discussed in relation to FIGS. 2A and 2B herein.
Referring initially to FIG. 1, there is shown, in cross-sectional view, a portion of an illustrative prior art field emission flat panel display device which may be of the type disclosed in the Borel et al. ('916) patent. In this embodiment, the field emission device comprises an anode plate having an cathodolumlnescent phosphor coating facing an emitter plate, the phosphor coating being observed from the side opposite to its excitation.
More specifically, the illustrative prior art vertical resistor field emission device of FIG. 1 comprises a cathodoluminescent anode plate 10 and an electron emitter (or cathode) plate 12. The cathode portion of emitter plate 12 includes conductive layer 15 formed on an insulating substrate 18, a resistive layer 16 formed over conductive layer 15, and a multiplicity of electrically conductive microtips 14 formed on resistive layer 16.
A gate electrode comprises a layer of an electrically conductive material 22 which is deposited on an insulating layer 20 which overlies resistive layer 16. Microtip emitters 14 are in the shape of cones which are formed within apertures 34 through conductive layer 22 and insulating layer 20. The thicknesses of gate electrode layer 22 and insulating layer 20 are chosen in such a way that the apex of each microtip 14 is substantially level with the electrically conductive gate electrode layer 22. Conductive layer 22 is arranged as rows of conductive bands across the surface of emitter plate 12, and conductive layer 15 is arranged as columns of conductive bands across the surface of emitter plate 12, the rows of conductive layer 22 being orthogonal to the columns of conductive layer 15, thereby permitting matrix-addressed selection of microtips 14 at the intersection of a row and column corresponding to a pixel.
Anode plate 10 comprises an electrically conductive film 28 deposited on a transparent planar support 26, which is positioned facing gate electrode 22 and parallel thereto, the conductive film 28 being deposited on the surface of support 26 directly facing gate electrode 22. Conductive film 28 may be in the form of a continuous coating across the surface of support 26; alternatively, it may be in the form of electrically isolated stripes comprising three series of parallel conductive bands across the surface of support 26, as taught in U.S. Pat. No. 5,225,820, to Clerc. Anode plate 10 also comprises a cathodoluminescent phosphor coating 24, deposited over conductive film 28 so as to be directly facing and immediately adjacent gate electrode 22. In the Clerc patent, the conductive bands of each series are covered with a phosphor coating which luminesces in one of the three primary colors, red, blue and green.
One or more microtip emitters 14 of the above-described structure are energized by applying a negative potential to conductive layer 15, functioning as the cathode electrode, relative to the gate electrode 22, via voltage supply 30, thereby inducing an electric field which draws electrons from the apexes of microtips 14. The freed electrons are accelerated toward the anode plate 10 which is positively biased by the application of a substantially larger positive voltage from voltage supply 32 coupled between the gate electrode 22 and conductive film 28, functioning as the anode electrode. Energy from the electrons attracted to the anode conductor 28 is transferred to the phosphor coating 24, resulting in luminescence. The electron charge is transferred from phosphor coating 24 to conductive film 28, completing the electrical circuit to voltage supply 32.
The purpose of the resistive layer is to provide a ballast against excessive current in each microtip emitter and consequently homogenize the electron emission. Where the application of the field emission device is the excitation of pixels on a display screen, the resistive layer makes it possible to eliminate excessively bright spots. The resistive layer also makes it possible to reduce breakdown risk at the microtips by limiting the current and thus prevent the appearance of short circuits between rows and columns. Finally, the resistive layer allows the short-circuiting of a few microtip emitters with a gate conductor; the very limited leakage current (a few .mu.amperes) in the short circuits will not affect the operation of the remainder of the cathode conductor.
Borel et al. ('916) recommend a material for use as the resistive layer having a resistivity of between approximately 10.sup.2 and 10.sup.6 ohms.cm. More particularly, they recommend forming the resistive layer from a material chosen from the group including In.sub.2 O.sub.3, SnO.sub.2, Fe.sub.2 O.sub.3, ZnO and silicon in doped form.
Unfortunately, the problem caused by the appearance of short circuits between the microtips and the gate electrode is not solved in a satisfactory manner by a device of the type described in the Borel et al. ('916) reference. When a particle causes a short circuit of the microtip with the gate conductor, all of the voltage applied between the gate and the cathode conductor (approximately 70-100 volts) is transferred to the terminals of the resistive coating. In order to accept a few short circuits of this type, which are virtually inevitable in a display panel which may have hundreds of millions of microtip emitters, the resistive coating must be able to withstand a voltage of approximately 100 volts, which requires its thickness to exceed 2 .mu.meters (microns). Otherwise, it would lead to a breakdown from the effect of the heat, and a complete short circuit would appear between the gate conductor and the cathode conductor, making the electron emission source unusable. However, a resistive coating as thin as 2 microns is bound to have "pinholes" or other defects which will cause a breakdown of the resistive layer between the cathode conductor and microtip emitters.
An improved prior art lateral resistor cathode structure for a field emission device, which may be of the type disclosed in the Meyer ('780) patent, is illustrated in cross-sectional and plan views in FIGS. 2A and 2B, respectively. A microtip emissive cathode electron source is disclosed in this reference including cathode and/or gate conductors which are formed in a mesh structure, the microtip emitters being formed on the resistive layer in a matrix arrangement within the mesh spacings.
More specifically, the illustrative field emission structure 40 of FIGS. 2A and 2B includes a cathode conductor 42 having a mesh-like structure formed on an optional thin silica insulating layer 44 on a glass substrate 46. A resistive layer 48 formed over conductor 42 and insulating layer 44 supports a multiplicity of electrically conductive microtip emitters 50. A gate electrode, comprising a layer of an electrically conductive material 52, is deposited on an insulating layer 54 which overlies resistive layer 48. Microtip emitters 50 are in the shape of cones which are formed on resistive layer 48 within apertures 56 through conductive layer 52 and insulating layer 54. Conductive layer 52 is arranged as rows of conductive bands across the surface of field emission structure 40, and the mesh-like structure comprising cathode conductor 42 is arranged as columns of conductive bands across the surface of field emission structure 40, thereby permitting matrix-addressed selection of microtips 50 at the intersection of a row and column corresponding to a pixel.
This arrangement provides an improvement in breakdown resistance of a field effect microtip emissive device, without requiring an increase in the thickness of the resistive layer. The disclosed mesh-like structure of the cathode conductor (and/or the gate conductor), permits the cathode conductors and the resistive coating of the Meyer patent to lie substantially in the same plane. In this configuration, the breakdown resistance is no longer susceptible to defects in the thickness of the resistive coating; rather, the resistive coating which laterally separates the cathode conductor from the microtip provides a ballast against excessive current. It is therefore sufficient to maintain a distance between the cathode conductor and the microtip which is adequate to prevent breakdown, while still retaining a homogenization effect for which the resistive coating is supplied.
In the aforementioned prior art devices, each microtip is positioned atop a resistive layer. In the Borel et al. ('916) reference, the thickness, or vertical dimension, of the resistive layer provides a ballast against excessive current; in the Meyer reference, the lateral spacing along the resistive layer provides the ballast. The ballast is in the form of a resistive drop such that those microtips drawing the most current have the most resistive drop, thus acting in such a way as to reduce the current per tip. An equivalent circuit of the ballast arrangements of both references would have each tip in series with an individual buffer resistor to limit the field emission current.
However, as can been intuitively recognized from an examination of FIG. 2B, the ballast resistance between microtips 50 and cathode mesh structure 42 varies with the position of the individual microtip 50 within the array. In the illustrated arrangement comprising a four-by-four array, microtip 50.sub.C, in the corner of the array, will have a lower ballast resistance than microtip 50.sub.S, at a side of the array, which, in turn, will have a lower ballast resistance than microtip 50.sub.I, in the interior of the array. The effect of the difference in ballast resistance among the microtips becomes even more pronounced as the size of the array increases, to the point where, in a five-by-five or a six-by-six array, it is believed that the potential at one or more interior microtips will be insufficient to stimulate substantial electron emission. Thus, an arrangement is desired which will permit all of the microtips to be at a substantially equal potential.
Such an arrangement, however, must be cast within the restraints of the physical and electrical requirements of the system. First, in order to prevent excessive current from being used by a failed emitter microtip, the distance from the conductive cathode mesh to each microtip must be kept relatively large, i.e., a highly resistive path must be maintained between the mesh and each tip. Second, an optimal design dictates equal spacing from the conductive mesh to each microtip so that each tip will have equal emission and degradation characteristics.
Opposing the need for equal distances from each microtip to the conductive mesh is the need to pack as many microtips as possible into a small area to thereby reduce the emission current from each microtip. This need for dense packing can best be realized by having large clusters of microtips, with the extreme case being a complete array of microtips the size of the final display pixel. Unfortunately, the larger the cluster the greater the variation in tip to tip emissions due to resistive path differences to the conductive cathode mesh.
In view of the above, it is clear that there exists a need for an improved emitter structure for use in a field emission flat panel display device which provides ballasting against excessive current in each array of microtip emitters accompanied by improved uniformity of the electron emission from each microtip, while also permitting a high density of microtips on the emitter structure.